1. Field of the Invention
The present invention relates to a differential amplifier, and more particularly, to a differential amplifier that performs a limiter operation and needs to operate at a high frequency and in a wide band.
2. Description of the Related Art
In recent years, through an improvement in microprocessing technology for manufacturing semiconductor devices, a complementary metal-oxide semiconductor (CMOS) transistor has found its use in a radio frequency (RF) circuit using a gigahertz frequency band, thereby becoming available to form the RF circuit for handling a high frequency band signal and a circuit for handling a baseband signal on one chip.
FIG. 10 illustrates a configuration of a transceiver system of a terminal for wireless communications using frequency bands of several gigahertz. Note that in FIG. 10, each of a transmitter circuit and a receiver circuit has one signal line. However, any one of the transmitter circuit and the receiver circuit may have two signal lines, and a signal flowing through the two signal lines may be a differential signal. Here, taking an operation of the receiver circuit as an example, an antenna 1001 receives a signal transmitted from a transmitting terminal. The received signal is input to a radio frequency variable gain amplifier (RF-VGA) 1004 through a band-pass filter (BPF) 1002 and a switch 1003. In the RF-VGA 1004, the received signal is adjusted in its power, and then input to a mixer 1005 provided in a subsequent stage. The mixer 1005 is a circuit having a function of converting a frequency of the signal received from the RF-VGA 1004. In addition to the signal from the RF-VGA 1004, the mixer 1005 also receives a local signal generated by a phase-locked loop (PLL) 1015 and a voltage-controlled oscillator (VCO) 1016. The local signal is adjusted in its power by a differential amplifier 1017. The mixer 1005 multiplies the signal from the RF-VGA 1004 by the local signal. Through the multiplication, the mixer 1005 generates a signal having a frequency obtained by adding a frequency of the signal from the RF-VGA 1004 and a frequency of the local signal, and a signal having a frequency obtained by subtracting the frequency of the local signal from the frequency of the signal from the RF-VGA 1004, and outputs the signals to a low-pass filter 1006.
The low-pass filter 1006 outputs, for example, only the signal having the frequency obtained by subtracting the frequency of the local signal from the frequency of the signal from the RF-VGA 1004, of the signals output by the mixer 1005, to an intermediate frequency variable gain amplifier (IF-VGA) 1007 in a subsequent stage. The signal output by the low-pass filter 1006 is a signal having a baseband frequency. After that, the signal is adjusted in its power by the IF-VGA 1007, and then input to a demodulation circuit 1008. The demodulation circuit 1008 demodulates the received signal. A description of an operation of the transmitter circuit is omitted, but a mixer 1011 and a differential amplifier 1018, in particular, operate similarly to the mixer 1005 and the differential amplifier 1017 in the receiver circuit.
Reference is made to THOMAS H. LEE “The Design of CMOS Radio-Frequency Integrated Circuit” 2nd Edition P387 2004 Cambridge University Press for a specific circuit configuration applied to each of the differential amplifiers 1017 and 1018 of FIG. 10. FIG. 11 illustrates the specific circuit configuration of the differential amplifier. Circuit elements constituting the differential amplifier are provided between a power supply line, which supplies a power supply voltage VDD, and a ground line, which defines a reference potential. A load Z1 connected to the power supply line and a load Z2 connected in parallel with the load Z1 are necessary for the differential amplifier to operate, and each includes, for example, a resistor or an inductor. Two transistors NM41 and NM43 connected in series with the load Z1 are n-type MOS transistors. Two transistors NM42 and NM44 connected in series with the load Z2 are also n-type MOS transistors. A predetermined voltage V is applied to gate terminals of the MOS transistors NM43 and NM44. A signal from an input terminal Vin+ is applied to a gate terminal of the MOS transistor NM41, and a signal from an input terminal Vin− is applied to a gate terminal of the MOS transistor NM42. In the differential amplifier, an alternate current (AC) signal that oscillates with a predetermined amplitude is applied to each of the terminals Vin+ and Vin−. For example, the signal from the terminal Vin+ may be a sine wave, and the signal from the terminal Vin− may be a wave that has a phase different from the sine wave by 180°. Further, terminals Vout+ and Vout− are output terminals of the differential amplifier, and the terminal Vout− outputs a signal having an amplitude amplified with respect to the signal from the terminal Vin+ by a predetermined gain. In addition, the terminal Vout+ outputs a signal having an amplitude amplified with respect to the signal from the terminal Vin− by a predetermined gain. A load Zout connected to each of the output terminals Vout+ and Vout− includes a parasitic capacitance of a wiring connected to the output terminal and an input impedance of a circuit in a subsequent stage that uses the output signal from the output terminal, and has a capacitive impedance as a whole.
FIGS. 12A to 12C are graphs for illustrating an operation principle of the differential amplifier. Assume here that each of the loads Z1 and Z2 is a resistor having a resistance R, and a value of a current output from a constant current source is Ic. Assume now that a sine wave is input to the input terminal Vin+ as illustrated in FIG. 12A. Then, a waveform as illustrated in FIG. 12B is output from the output terminal Vout−. The waveform illustrated in FIG. 12B is amplified in its power compared to the waveform illustrated in FIG. 12A.
In this case, the signal input to the terminal Vin+ and the signal output from the terminal Vout− have phases different from each other. In FIGS. 12A and 12B, the signals may be regarded as having phases different from each other by 180°. This is because if the NMOS transistor NM43 is turned ON by the voltage V, a voltage drop amount at the output terminal Vout− caused by the load Z1 becomes larger as a voltage value of the signal from the terminal Vin+ becomes higher and a higher voltage is applied to the gate of the NMOS transistor NM41 to cause a larger current to flow between a source and a drain of the NMOS transistor NM41. This is also because the voltage drop amount at the output terminal Vout− caused by the load Z1 becomes smaller as the voltage value of the signal from the terminal Vin+ becomes lower and a lower voltage is applied to the gate of the NMOS transistor NM41 to cause a smaller current to flow between the source and the drain of the NMOS transistor NM41. In other words, as the amplitude of the signal input to the terminal Vin+ is increased, the amplitude of the signal output from the output terminal Vout− is decreased, and as the amplitude of the signal input to the terminal Vin+ is decreased, the amplitude of the signal output from the output terminal Vout− is increased. With the signal input to the terminal Vin+ and the signal output from the terminal Vout− changing in amplitude as described above, signal waveforms as illustrated in FIG. 12A and FIG. 12B may be obtained. Note that as illustrated in FIG. 12C, the signal output from the terminal Vout+ and the signal input to the terminal Vin+ have the same phase. This is because the signal input to the terminal Vin− and the signal input to the terminal Vin+ have phases different from each other by 180°. This phase relationship makes the signal input to the terminal Vin+ and the signal output from the terminal Vout+ have the same phase.
As described above, FIG. 10 illustrates the transceiver system of the terminal for wireless communications, and in designing such system, it is desired to limit the value of the signal input to the demodulation circuit 1008 to a certain range. This is because when a signal having a large amplitude above the certain range or a signal having an amplitude that is within the certain range but too small is input to the demodulation circuit 1008, desired characteristics are not obtained, resulting in deteriorated characteristics due to the system design. For example, when the signal having the large amplitude as described above is input to the demodulation circuit 1008, the waveform input to the demodulation circuit 1008 is distorted because a circuit in an input stage of the demodulation circuit 1008 is not designed to process the signal having such large amplitude. This waveform distortion makes it impossible to obtain the desired characteristics. On the other hand, for example, in the case of the signal having the small amplitude as described above, the waveform input to the demodulation circuit 1008 is buried in noise due to a low signal to noise (S/N) ratio and the demodulation circuit 1008 may not be able to successfully process the input signal. For those reasons, it is necessary to ensure in design that the amplitude of the signal input to the demodulation circuit 1008 is within the certain range. In order to attain this, it is important to determine gains of the RF-VGA 1004, the mixer 1005, the low-pass filter 1006, and the IF-VGA 1007 with respect to the signal received through the antenna. In this case, the RF-VGA 1004 and the IF-VGA 1007 have two functions of absorbing variation in gain among circuit elements when the system is manufactured as a semiconductor integrated circuit, and of adjusting a system gain with respect to a level of the received signal, to thereby adjust the gain of the entire system. As a result of the adjustment, the gains of the RF-VGA 1004 and the IF-VGA 1007 are uniquely determined. The gain of the low-pass filter 1006 is also uniquely determined according to its circuit configuration (the low-pass filter has a negative gain so as to attenuate the signal). However, the gain of the mixer 1005 with respect to the signal received through the antenna is not uniquely determined by merely determining its circuit configuration. This is because the gain of the mixer 1005 depends also on the local signal which is output from the differential amplifier 1017 and input to the mixer 1005. As described above, the mixer 1005 multiplies the signal received through the antenna by the local signal output from the differential amplifier 1017. This multiplication not only converts the frequency of the signal received through the antenna, but also changes the amplitude of the signal received through the antenna. Therefore, the gain of the mixer 1005 with respect to the signal received through the antenna changes with the change in amplitude of the local signal. This is disadvantageous in limiting the amplitude of the signal input to the demodulation circuit 1008 to the certain range, and hence it is necessary to uniquely determine the gain of the mixer 1005.
The gain of the mixer 1005 with respect to the signal received through the antenna may be uniquely determined when the amplitude of the local signal output from the differential amplifier 1017 is set constant. This is because when the amplitude of the local signal is constant, the gain of the mixer 1005 may be uniquely determined and stabilized according to its circuit configuration. For this purpose, there is known a limiter operation of the differential amplifier that makes the amplitude of its output signal constant. The limiter operation using the differential amplifier of FIG. 11, for example, is described with reference to FIGS. 12A to 12C. Assume that each of the loads Z1 and Z2 is a resistor having a resistance R. As illustrated in FIGS. 12B and 12C, each of the signals output from the output terminals Vout+ and Vout− of the differential amplifier of FIG. 11 in this case has a maximum value of VDD. This is because the voltage drop from the power supply voltage VDD is used to change the values of the signals from the output terminals Vout+ and Vout− of the differential amplifier of FIG. 11. Therefore, in this case, the amplitude values of the signals output from the differential amplifier do not exceed the power supply voltage VDD.
Meanwhile, a center of oscillation of each of the signals output from the output terminals Vout+ and Vout− is VDD-R(Ic/2). This is because in a steady state where a constant direct current (DC) voltage is applied to the input terminals Vin+ and Vin− to cause the same source-drain current to flow through the MOS transistors NM41 and NM43 and the MOS transistors NM42 and NM44, the current Ic output from the constant current source is divided in half. The signals as illustrated in FIG. 12B and FIG. 12C are desirably taken out from the output terminals by increasing and decreasing the constant DC voltage input to the input terminals Vin+ and Vin− at a constant frequency by the differential amplifier in this steady state.
In the viewpoint of the operation of the differential amplifier as a whole, when the current Ic is allowed to flow through the entire circuit and the constant current source has a resistance RD, the constant current source having the resistance RD generates a potential Ic*RD with respect to a ground (GND) reference (0 V) as illustrated in FIG. 13. Further, the input transistors NM41 and NM42 operate in a saturation region and consume a predetermined source-drain voltage Vds. The cascode connected transistors NM43 and NM44 operate at an output stage, and hence a voltage is generated up to at least about a saturation drain voltage Vsat between a drain and a source of each of the transistors NM43 and NM44. The saturation drain voltage Vsat refers to a drain-source voltage corresponding to a transition boundary between a linear region and the saturation region of the MOS transistor. Even if a signal having a larger amplitude is input to the input transistors NM41 and NM42 so as to generate a voltage lower than the saturation drain voltage Vsat between the drain and the source of each of the transistors NM43 and NM44, when the source-drain voltage of each of the transistors NM43 and NM44 is further reduced, the transistors NM43 and NM44 operate in the linear region to decrease the current flowing through the transistors NM43 and NM44. As a consequence, the voltage drop amount from the power supply voltage VDD is decreased to increase the voltage generated at the drain of each of the transistors NM43 and NM44, and as a result, the voltage lower than the saturation drain voltage is not generated between the source and the drain of each of the transistors NM43 and NM44. In this case, the output terminals Vout+ and Vout− of the differential amplifier are connected to the transistors NM43 and NM44. Therefore, a minimum value of the voltage generated at each of the output terminals of the differential amplifier is VDD-Ic*RD-Vds-Vsat. This value and the power supply voltage VDD described above define an output range (allowable output operation range) of the differential amplifier.
Assume that the amplitude of each output signal has the maximum value of VDD and the minimum value of VDD-Ic*RD-Vds-Vsat when the input signal to the differential amplifier is amplified. Even if a signal larger in amplitude than the input signal is input to the terminals Vin+ and Vin− of the differential amplifier, the value of the output signal is neither increased above VDD nor reduced below VDD-Ic*RD-Vds-Vsat. That is, in this case, each of the signals output from the differential amplifier has a constant value. This is the limiter operation.
In the limiter operation described above, the loads Z1 and Z2 of the differential amplifier are resistors. However, a wireless communications system may handle a signal having a frequency as high as, for example, several MHz to 10 GHz. In such a case, it becomes difficult for the differential amplifier using the resistors as the loads Z1 and Z2 to perform the limiter operation on the signal having such high frequency. This is because each of the loads Zout connected to the output terminals Vout+ and Vout− of FIG. 11 has a capacitive impedance, and frequency characteristics on the high frequency side of the differential amplifier are decreased as the frequency of the signal handled by the differential amplifier is increased. Specifically, an amplification factor of the differential amplifier is decreased as the frequency of the signal handled by the differential amplifier is increased. This is because the capacitive impedance is decreased in proportion to a value of the frequency of the signal to be handled. As the frequency of the signal handled by the differential amplifier is increased, the impedance of the load Zout is decreased to increase current components that are not output from the output terminal Vout+ or Vout− and caused to flow through the load Zout and into the ground. As a result, a smaller current is allowed to flow to the side of the output terminal Vout+ or Vout−. As the current flowing into the terminal Vout+ or Vout− is decreased, the value of the voltage generated at the terminal Vout+ or Vout− is also decreased. Due to this phenomenon, the value of each of the signals output from the output terminals Vout+ and Vout− does not reach the above-mentioned maximum value and minimum value for the input signal having the high frequency. Then, the value of each of the signals output from the differential amplifier does not take the constant maximum value and minimum value for performing the limiter operation, and it becomes difficult to perform the limiter operation. Under such a situation, it is impossible to obtain the desired high gain and the limiter operation, and hence it becomes impossible to set the gain of the mixer 1005 constant.
It has also been conventionally known to use inductors as the loads Z1 and Z2 of the differential amplifier in order to obtain a good gain with respect to the high frequency signal. An inductor has a function of increasing the gain with respect to the high frequency signal in the differential amplifier. This is because of the characteristic that an impedance of the inductor increases in proportion to the frequency of the input signal. As a value of the impedance of the inductor increases, a voltage drop in each of the signals output from the output terminals Vout+ and Vout− of the differential amplifier of FIG. 11 becomes larger with respect to the power supply voltage VDD. In other words, each of the signals output from the terminals Vout+ and Vout− is increased in amplitude. In view of the frequency characteristics, compared with the case where the resistors are used as the loads of the differential amplifier, using the inductors as the loads of the differential amplifier makes it easier to enhance high frequency characteristics despite the effect of the capacitive impedance of the output load Zout. In other words, compared to the case where the loads are the resistors, the inductors as the loads may maintain a high amplification factor even for the signal having the higher frequency. This is because, in view of the frequency characteristics of the amplification factor of the differential amplifier, while an estimated value of the frequency at which the amplification factor starts to decrease is about 1/(RC) in the case where the loads are the resistors, the estimated value of the frequency is about 1/(LC) (½) in the case where the loads are the inductors.
However, when the inductors are used as the loads Z1 and Z2 of the differential amplifier, it becomes difficult to make the differential amplifier perform the limiter operation. This is because when the inductors are used as the loads Z1 and Z2 of the differential amplifier, each of the signals output from the output terminals Vout+ and Vout− oscillates about the power supply voltage VDD. This is because in the case where the loads are the inductors, the inductors do not cause a voltage drop in a steady state. When the center of amplitude of each of the signals output from the differential amplifier reaches the power supply voltage VDD, the range (allowable output operation range) of the value of each of the signals output by the differential amplifier is increased. This is described with reference to FIG. 14. As in FIG. 13, the constant current source having the resistance RD generates the potential Ic*RD with respect to the GND reference (0 V). The input transistors NM41 and NM42 operate in the saturation region and consume the source-drain voltage Vds of a predetermined value. The cascode connected transistors NM43 and NM44 operate at an output stage, and hence a voltage is generated up to at least about the saturation drain voltage Vsat between the source and the drain of the transistors NM43 and NM44 as described above. In this case, where the loads of the differential amplifier are the inductors, there is no maximum value for voltage values above the power supply voltage VDD, which is the center of oscillation. However, there is a minimum value of VDD-Ic*RD-Vds-Vsat for voltage values below the power supply voltage VDD. Therefore, this minimum value restricts the maximum value of each of the signals. When an absolute value is represented by the symbol ∥, the maximum value is VDD+|VDD-Ic*RD-Vds-Vsat|. Consequently, the range (allowable output operation range) of the value of each of the signals output by the differential amplifier is 2×(VDD-Ic*RD-Vds-Vod). As can be seen, when the inductors are used as the loads, twice the output amplitude in the case where the resistors are used as the loads is obtained. However, it is required for the differential amplifier to amplify the input signal with a correspondingly higher amplification factor, and it becomes difficult to perform the limiter operation.
As described above, according to the conventional technology, the attempt to make the amplitude of each of the signals output by the differential amplifier constant fails to appropriately make the amplitude constant for the input signal having the high frequency because a gain drop occurs, and the attempt to increase the decreasing gain makes it difficult to realize the limiter operation of the differential amplifier that makes the amplitude constant. Consequently, the conventional technology has had a technical problem to be solved in that it is difficult for the differential amplifier that amplifies the signal having the high frequency to make the amplitude of each output signal constant.